Description:
Responsibilities: Develop and optimize DFT features for use in complex digital systems Perform structural scan and at-speed scan insertion, automatic pattern generation, and scan coverage analysis (Cadence Genus w/ Modus or Siemens Tessent) Create DFT patterns for ATE to enable high volume manufacturing Design and contribute to design for test (DFT) methodologies Work with designers to integrate DFT flow into a digital tool flow Basic Qualifications: BS, MS, or PhD in Electrical Engineerin
Feb 13, 2025;
from:
dice.com