Description:
Job Title: Senior Physical Design Engineer (Full-Chip Expertise) Location: [Bay area, Austin] [Hybrid] Experience: 7+ years Key Responsibilities: Lead and execute full-chip physical design activities, including floorplanning, placement, clock tree synthesis (CTS), routing, and signoff. Develop and implement physical design methodologies to achieve power, performance, and area (PPA) targets. Perform timing closure and optimize designs for setup, hold, and other timing constraints. Conduct power
Feb 24, 2025;
from:
dice.com