Description:
Role: Design Verification Engineer Location: Mountain View, CA (Hybrid) Hire Type: Contract Job Description Design Verification Engineer Key Responsibilities: 08-14 Years Experience Strong understanding of SV and UVM and good debugging skills. Understanding of AMBA protocols. Understand design specs and develop test plans based on functional and architectural requirements Build UVM/System Verilog-based verification environments for IP/subsystem/SoC level testing Develop directed and random
Apr 24, 2025;
from:
dice.com