Description:
Job Title: Design Verification Location: Onsite, Santa Clara, CA Duration: 6+ month contract with possibility of extension Interview: Video 1st spot Person needs these ethernet protocols (DDR PHY, PCI PHY) This role in more Urgent DV - Ethernet PHY, PCI PHY and DDR PHY (looking at these specific areas of experiences) 2nd Verification spot Person must be very strong in UVM and system Verilog, Ethernet protocol experience not as important. Qualifications: 7 years of recent experience in Pcie (up
May 22, 2025;
from:
dice.com