Where

Performance Modeling and Verification Engineer - Onsite

VIVA USA INC
Santa Clara Full-day Temporary

Description:

Title: Performance Modeling and Verification Engineer - Onsite Mandatory skills: SystemC, TLM2, ASIC, ASIC development, software, firmware, hardware, C, C++, Linux, Linux Environment, debug, debug tools, Gdb, Valgrind, Perl, Makefiles, DPI, PLI, PCIe, AXI, Verilog, SystemVerilog, SystemC, memory controllers, peripherals, interconnects, system design, system testing, system debugging, performance models, performance issues, design specifications, SV, UVM Functional Verification, Performance Veri
Jul 11, 2025;   from: dice.com

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