Description:
Sr SoC Gate-Level Simulation (GLS) Engineer In need of a solid Gate-Level Simulation Engineer to support complex System-on-Chip (SoC) development. In this contract role, you ll be responsible for verifying gate-level functionality, timing, and power across SoC subsystems. You'll work closely with RTL, physical design, and verification teams to ensure accurate coverage and system-level stability. Scope: Develop and apply GLS methodologies for high-performance SoC projects Run gate-level simulati
Jul 21, 2025;
from:
dice.com