Description:
Title: Product development Engineer Location: Santa Clara, CA Duration: FTEJob description:- Gathering all test program requirements (structural coverage, Vmin/Vmax/Fmax routines to measure degradation etc) and work with Test Teams to ensure all content is enabled. product verification and failure analysis on Verigy 93K tester. ATE 93K, Tester hands on Yield, Reliability, Characterization, Correlation System analysis, Data analysis ATPG topic memory side VLSI - logic, VLDL CMOS viH,vil, flip f
Jul 28, 2025;
from:
dice.com