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System Validation Engineer

Sureminds Solutions
Santa Clara Full-day Temporary

Description:

C2C Role Please share Profiles at Hi, Urgent need, Role : System Validation Engineer Location : Santa Clara, CA onsite We are seeking a skilled engineer to support DDR (DDR3/DDR4) bring-up, margining, and characterization activities. The ideal candidate will have hands-on experience in DDR diagnostics, margin testing, and qualification of different DIMMs, as well as strong scripting skills in C and Python. Key Responsibilities Execute DDR3/DDR4 memory bring-up and system marginality validation
Aug 1, 2025;   from: dice.com

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