Description:
Verification & Validation (V&V) System Engineer, Designer Deep dives into component and subsystem designs to develop and define verification approaches, types, levels in a clearly defined RVCM (requirements verification compliance matrix)Collaborating with diverse technical teams such as software, mechanical, modem, and compliance teams to validate expectations for system-level and network-level operations, from concept through executionIntegrating and performing verification of the end-to-end R
Aug 4, 2025;
from:
dice.com