Description:
We are looking for a Senior ASIC/RTL Design Engineer for our client in San Jose, CA Job Title: Senior ASIC/RTL Design Engineer Job Location: San Jose, CA Job Type: Contract Job Description: Pay Range: $70.86hr - $75.86hrSuccessful candidates will be responsible for leading and participating in the design of leading-edge SoCs in advanced digital CMOS processes.Our RTL Design Engineers are expected to contribute in all aspects of SoC design, including: Chip definition, Architecture development, a
Sep 23, 2025;
from:
dice.com