Description:
Role: Signal Integrity (SI) and Power Integrity (PI) Engineer Location: Sanjose, CA (Onsite) JD: Signal Integrity Engineer should support high-speed interface development and validation. The engineer will work on state-of-the-art technologies such as LPDDR5X, PCIe Gen7, and UCIe (64G). Responsibilities: Perform channel modeling, extractions, and eye analysis for high-speed interfaces.Conduct pre- and post-layout simulations to ensure compliance with interface standards.Analyze crosstalk, reflect
Oct 17, 2025;
from:
dice.com