Description:
Role: Experienced (> 5y) Signal Integrity Engineer to support high-speed interface development and validation. The engineer will work on state-of-the-art technologies such as LPDDR5X, PCIe Gen7, and UCIe (64G). Responsibilities: Perform channel modeling, extractions, and eye analysis for high-speed interfaces. Conduct pre- and post-layout simulations to ensure compliance with interface standards. Analyze crosstalk, reflections, jitter, and insertion/return loss. Collaborate with design, package,
Oct 28, 2025;
from:
dice.com