Description:
Job Title: Senior FPGA/RTL Design Engineer Location: Remote Contract: 12+ Months What You'll Be Doing: Strong expertise on Arteris Design Toolset At-least 5+ years of experience in Verilog Design AMBA AXI bus along-with ARM or C based processor Ensure customer satisfaction. Reporting to customers on daily or weekly progress effectively. What We Are Looking For: Develop and test RTL modules on AMD/Xilinx FPGA devices (required) and ASIC targets (preferred) Develop and maintain build/simulation sc
Oct 28, 2025;
from:
dice.com