Description:
We are looking for Senior ASIC/RTL Design Engineer for our client in San Jose, CA Job Title: Senior ASIC/RTL Design Engineer Job Location: San Jose, CA Job Type: Contract Job Description: Pay Range: $64.68hr - $81.42hrThe RTL Design Engineer will be responsible for leading and participating in the design of cutting-edge SoCs in advanced digital CMOS processes. The role offers exposure to a range of IPs, including ARM cores, Ethernet, DDR, DMA, PCIe, SATA, and internal client IPs. The candidate
Oct 29, 2025;
from:
dice.com