Description:
Job Title: FPGA Design Verification Engineer/Technical Lead II - VLSI Location: Santa Clara, CA Experience : 10+ Experience Required Skills Strong understanding of FPGA, ASIC, RTL design principles, and architectures. Proficiency in SystemVerilog and UVM verification methodology. Hands-on experience with Linux operating systems. Proficiency with verification tools such as QuestaSim, Synopsys VCS, HAPS, etc. Knowledge of high-speed I/O design and protocols (PCIe, I2C, SPI, etc.). Experience using
Nov 11, 2025;
from:
dice.com