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FPGA/Design Verification Engineer

ADPMN Inc
Mountain View Full-day Full-time

Description:

Job Title: FPGA/Design Verification Engineer Location: Mountain View, CA (Onsite) Duration: 12%2B Months Job Description : Strong understanding of FPGA design principles and architectures. Proficiency in System Verilog and UVM verification methodology. Experience with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS). Knowledge of code coverage and functional coverage analysis. Excellent debugging and problem-solving skills. Strong communication and collaboration skills. Requi
Dec 2, 2025;   from: dice.com

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