Description:
Staff Machine Learning Engineer, LLM Fine-Tuning (Verilog/RTL Applications)Level: Staff Location: San Jose, CA Cloud: AWS (primary: Bedrock + SageMaker) Why this role existsYou will architect and lead privacy-preserving LLM capabilities that support hardware design teams working with Verilog/SystemVerilog and RTL artifacts. This includes code generation, refactoring, lint explanation, constraint translation, and spec-to-RTL assistance. You ll lead a small, high-leverage team focused on fine-tun
Dec 8, 2025;
from:
dice.com