Where

Senior RTL Design Engineer

Jobot
Irvine Full-day Full-time

Description:

Principal RTL Design Engineer / Senior FPGA Design Engineer Needed for Leading Telecom Company! This Jobot Job is hosted by: Reed Kellick Are you a fit? Easy Apply now by clicking the "Apply Now" button and sending us your resume. Salary: $150,000 - $250,000 per year A bit about us: Based in Irvine, are a growing division of a leading telecom company that is on the lookout for a talented Staff RTL Design Engineer / Principal FPGA Design Engineer! Why join us? As a Lead RTL Design Engineer /
Jan 20, 2026;   from: dice.com

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