Description:
Role: Sr. Analog Design Engineer Location: Santa Clara, CA (Fully onsite) Duration: 12+ Months Must have: Analog circuit design experience in DACs, ADCs, current drivers, linear regulators, and other various supporting circuitry in CMOS processes.Proficiency in the use of Python to generate test code for silicon verification & characterization.Good understanding of IC device physics, spice models, ESD, latch-up, and manufacturing technology are also required.Proficient in the use of Cadence's I
Jan 27, 2026;
from:
dice.com