Where

Dv Engineer

Sivaltech
San Jose Full-day Temporary

Description:

"Exciting opportunity alert! A leading supplier of state-of-the-art SoC and embedded IP is hiring for a Verification Engineer to join their high-performance design team! Responsibilities include: - Developing verification environments using System Verilog and UVM - Designing verification components and behavioral models - Implementing coverage and assertions - Debugging simulation failures and analyzing coverage results Requirements: - Bachelor's degree in EE, CS, or equivalent - 12+ years of
Feb 3, 2026;   from: dice.com

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