Description: Position: PCIe Validation Engineer Location: San Diego, CA Exp: 5-8 years PCIe Gen 4/5/6, CXL ... Take lead responsibility for validating PCIe and its subsystems on multiple ...
9 days ago
Description: Position: PCIe Validation Engineer Exp: 5-8 years PCIe Gen 4/5/6, CXL, RISC-V, ARM, Oscilloscope, ... Take lead responsibility for validating PCIe and its subsystems on multiple ...
7 days ago
Description: Position: Hardware Design Engineer (Architect) Location: San Jose, USA ... , oscilloscopes, multi-meters, signal generators, PCIe Gen5/6, LPDDR5/6 5 - 8 years of experience ...
2 days ago
Description: Position: System Level Test Engineer Location: San Diego, USA Key ... , bench testing, TPUs, CPUs, GPUs, PCIe, Ethernet , C#, C/C++, PERL, Python, .NET framework ...
15 days ago