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Jobs and careers for asic timing engineer from the company Peoplentech in California (4 jobs)

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  • PeopleNTech
  • San Jose
Description: Position: Senior ASIC Design Engineer Location: San Jose, CA (Complete ...
15 days ago
  • PeopleNTech
  • San Jose
Description: What candidate will Be Doing: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components.Establish prototyping systems in the lab and contribute to ...
14 days ago
  • PeopleNTech
  • San Jose
Description: SDC Engineer Location: San Jose CA (Day ... have/Primary skills: Fullchip timing, SDC changes back to block ... chip SDC development, Static Timing Analysis, Primetime/TempusWhat You' ... teams to close fullchip timing in multiple timing modes.Option to ...
4 days ago
  • PeopleNTech
  • San Jose
... have/Primary skills: Full chip timing, SDC changes back to block ... /Full chip SDC development, Static Timing Analysis, Primetime/Tempus What You ... to close full chip timing in multiple timing modes.Option to also ...
5 days ago