Description:
Must have/Primary skills: Full chip timing, SDC changes back to block level, Block/Full chip SDC development, Static Timing Analysis, Primetime/Tempus What You'll Be Doing: Being a member of design team who oversees full chip SDCs and works with physical design and DFT teams to close full chip timing in multiple timing modes.Option to also do block level RTL design or block or top-level IP integration.Helping develops efficient methodology to promote block level SDCs to full chip, and to bring f
May 22, 2025;
from:
dice.com