Description: Role: Design Verification Engineer Work Location: Santa Clara, CA ... 7+ years of experience in pre-silicon design verification Proficiency in C-shell scripting ... functional code coverage. SOC Verification experience using ARM Cortex Microcontroller ...
3 days ago
Description: We are looking for Silicon Validation Engineer for our client in Markham ... , ON Job Title: Silicon Validation Engineer Job Location: Markham, ON ... within the IPs in post-silicon.Hands-on execution on datacenter ...
20 days ago
... : We are looking for Design Verification Engineer for our client in Sunnyvale ... , CA Job Title: Design Verification Engineer Job Location: Sunnyvale, CA Job ... from test planning to closing verification using coverage metrics.Involves test ...
3 days ago
... Job Description: As a Verification Engineer, you will own functional verification for a custom controller ... You will develop functional verification infrastructure to ensure functional correctness ... the throughput of the verification effort.In this role, ...
3 days ago
... an experienced FPGA Design and Verification Engineer to join our team. The ... design, timing closure, and the verification/validation of complex systems. This ... Responsibilities: Digital Logic Design and Verification: Design and verify digital circuits ...
19 days ago
Description: Role: Design Verification Engineer Location: Santa Clara, CA Interview: ... /C/C++ Responsibilities: Architect and Create verification environments using System-Verilog and ... Universal verification methodology-UVM IPs and ...
26 days ago
Description: Title: Software Verification Engineer II - Onsite Mandatory skills: Python ...
9 days ago
Description: DivIHN (pronounced divine ) is a CMMI ML3-certified Technology and Talent solutions firm. Driven by a unique Purpose, Culture, and Value Delivery Model, we enable meaningful connections between talented professionals and forward-thinking ...
8 days ago
... Define, document, and implement a UVM verification environment including agents and scoreboards ... , checkers, coverage, and other verification collateral Run tests on RTL ... and recommend fixes Support post-silicon verification activities of the products working ...
26 days ago
Description: Role : ATE Engineer Location : Bay Area , CA onsite ... program development, ATE Testing and Silicon Qualification Define / Test Plan for ... the ATE Testing and Silicon Qualification Develop Test program for ...
9 days ago
... or scientific use. A typical hardware engineer is responsible for the manufacture ... tools and techniques for post-silicon coverage analysis. Execute coverage collection ... on pre-silicon simulation and emulation platforms. Comprehend ...
10 days ago
Description: Title: Electrical Engineer 5Location: Silicon Valley, CA(onsite)Contract:6+ Month ...
9 days ago
Description: As a Software QA Engineer, you will be responsible for ... cross functionally with marketing, architects, silicon development and the SW teams ...
26 days ago
... techniques. While experience in post-silicon or hardware development is optional ...
18 days ago
... : EM/IR Expert (Physical Design Verification) Location: Sunnyvale, CA (Onsite) Duration ... EM/IR Expert (Physical Design Verification) role with strong experience on ...
11 days ago
Description: Job Title: Electrical Engineer Location: Irvine, CA (On-site ... : 12 Months Job description: Electrical Engineer with schematics experienceElectrical schematics, BOMs ... HW design and test benchDesign Verification test plan for each LRU ...
19 days ago
Description: Position: Systems Engineer - Customer Platform Integration Location: San ... -of-systems integration, troubleshooting, and verification testing. Client and platform integration ...
26 days ago
... immediately hiring for a(n) FPGA ASIC Verification Engineer Position type: Contract. Duration: 6 months ... FPGA, ASIC, Verification, UVM, SystemVerilog As a(n) FPGA ASIC Verification Engineer you will: Minimum ...
3 days ago