Description: Job Description: Responsibilities: Develop/Maintain tests for functional verification with UVM verification at the subsystem level. Build test bench components to support the next generation IP. Maintain or improve current test libraries to ...
23 days ago
Description: Position: Senior Design Verification Engineer Location: Mountainview, California Experience: 7 to 12 years What candidate will Be Doing: Strong expertise along-with complex SoC/IP debug is mustAt-least 5+ years of experience in System Verilog ...
26 days ago
Description: Position: Senior Design Verification Engineer Location: Mountainview, California (Complete onsite) Experience: 7 to 12 years only (Relevant) What candidate will Be Doing: Strong expertise along-with complex SoC/IP debug is mustAt-least 5+ ...
29 days ago