Description: Position: PCIe Validation Engineer Location: San Diego, CA Exp: 5-8 ... , timing margin analysis, and overall reliability.Collaborate with design and firm
10 days ago
Description: Position: PCIe Validation Engineer Exp: 5-8 years PCIe Gen 4/5/6, CXL, ... , timing margin analysis, and overall reliability.Collaborate with design and firmware ...
17 days ago