... The main function of the Verification Engineer is to work with a group ... researchers and engineers to own the electrical system level verification of ... Using verification skills to define verification requirements, create test cases, design and implement ...
20 days ago
Description: Role: CAD/EDA Engineer Silicon Design/Verification Infrastructure Location: San Francisco, CA ... /CAD SoC/IP design and/or verification infrastructure development. Proficiency ... experience. Knowledge of ASIC/SoC design flows, SystemVerilog, and UVM ...
27 days ago
... We are looking for Senior Verification Engineer for our client in East ... Markham, ON Job Title: Senior Verification Engineer Job Location: East Markham, ON ... RTL designers and other verification engineers to achieve verification closure within project schedules ...
5 days ago
... : Mid-level Verification Engineer with 5-8 years of experience of pure verification in FPGA ... . This is a pure Verification Engineer role. This position is onsite ... will be doing: Purely verification of FPGAProgramming using SystemVerilogDevelop OO ...
6 days ago
Description: Title: Verification Engineer Location: Sunnyvale, CA Type: Contract ... : The main function of the Verification Engineer is to work with a group ... researchers and engineers to own the electrical system level verification of client ...
21 days ago
Description: Verification Engineer IV Sunnyvale CA (Onsite) 6 months ( ... : The main function of the Verification Engineer is to work with a group ... -the-art systems.The engineer will define verification requirements, create test ca
21 days ago
... years of senior Pre-silicon verification engineer with PCIE physical, link layer ... state of the art of verification techniques, including assertion and ... metric-driven verification. Require familiarity with verification management tools. Prior ...
27 days ago
Description: Role: Mixed-Signal Verification Engineer Location: San Jose, CA 100% ... logic. Solid understanding of digital design for mixed-signal control loops ...
27 days ago
Description: Title: Pre-Silicon Verification Engineer Contract Length: Initial 6-month contract ( ...
21 days ago
... opportunity to: This type of verification can span simulation and emulation ...
11 days ago
Description: Contract Length: Initial 6-month contract (potential to go 18-months) Location:100% onsite in either Sunnyvale, CA, San Francisco, CA or Austin TX Industry: Social Media Work Authorization: Prefers G.C or U.S Citizen. Minimum Requirements ...
21 days ago
Description: Should be good in hands-on using SV/UVM. AMBA (especially AXI is a must) Experience in updating sequence, test, running and debugging Experience in PCIE or C based is a plus
21 days ago
... Software Engineer. Our team focusses on providing software stack for Design Verification of ... , doing s/w prototypes for early "h/w + s/w co-designs". You will get a chance to ...
5 days ago
... SoC-level. Lead and manage verification teams, including planning, execution, ... comprehensive verification plans, including testbenches and test cases. Collaborate with design, ... architecture, and software teams to define and implement verification ...
26 days ago
Description: Job Title: PCIe Engineer (Peripheral Component Interconnect Express) ... Engineering Required Skills: Pre-silicon verification / UVM methodology Key Responsibilities: ... SoC-level. Lead and manage verification teams, including planning, execution, ...
21 days ago
Description: Job Title: PCIe Engineer (Peripheral Component Interconnect Express) ... Engineering Required Skills: Pre-silicon verification / UVM methodology Key Responsibilities: ... SoC-level. Lead and manage verification teams, including planning, execution, ...
25 days ago
Description: Job Title: Software Engineer Python & C Location: Vista ... a highly skilled Software Engineer with expertise in Python ... contribute to the design, development, and verification of high-integrity ... 178C software development and verification as well as ...
13 hours ago
Description: Title: Verification Test Engineer - Onsite Mandatory skills: software, firmware, ...
4 days ago
Description: Role: System Engineer Location: San Mateo, CA (4 ... Product level electrical design including component selection, circuit design, subsystem design and schematic ... debugging, hardware bug tracking, functional verification, and signal characteriza
19 days ago
Description: Role: RTL Design Engineer Location: Santa Clara, CA Remote ... hands-on experience in digital design at the RTL level using ... , quality checks (QC), and basic verification techniques. Experien
27 days ago