... Senior Analog IC Design Engineer to join its Bufferchip Design team in Agoura ... role, the Senior Analog IC Design Engineer will report to the Senior ... role in product definition and design. The position offers hig
18 days ago
... a project team of engineers involved in the specification, design, development, and test ... engineer will work closely with hardware design engineers, software/diagnostic engineers, and manufacturing test engineers ...
14 days ago
... : Role Summary Experienced Electrical Sr. Design Engineer / Lead with 6 to 10 years ... experience in Aerospace Electrical system design specifically for First Class & Business ... First Class & Business class seating design. Suite El
27 days ago
... Electrical Technical Lead/ Sr. Electrical Engineer Role #1: Electrical Technical Lead/ Sr ... . Electrical Engineer Location: Huntington Beach or Central ... Role Summary: Experienced Electrical Sr. Design Engineer / Lead with 6 to 10 ...
13 days ago
... Description: Overall Responsibilities: As a Packaging Design Engineer, you will create iconic, sustainable ... : Be responsible for the conception, design, development, documentation creation, validation and ...
21 days ago
... industry. As a Tesla safety & restraints design engineer, you will take ownership of ... in savings lives. The mechatronics design engine
23 days ago
Description: Senior Electrical Engineer Open to H1b, OPT, and ... : Sr Electrical Engineer You are an expert electrical design engineer skilled in full ... will be responsible for the design
26 days ago
... environment alongside physicists, design engineers, and superconducting foundry engineers to make our technologies ...
5 days ago
Description: Job Title: Project Engineer Location: North Hollywood, CA (Onsite) ... : Long Term Job Description: Mechanical engineer / Design engineers, with Manufacturing engineering background. Technology ...
7 days ago
Description: Job Title : Restraint Engineer Location : Irvine, CA (Onsite Opportunity) ... , Joyson, Toyota Gosei and ZFMechanical Design Engineer with Catia V6 tool expertiseStyling ...
28 days ago
... ) for complex chip-level ASIC designs Perform static timing analysis (STA ... with RTL, architecture, and physical design teams on clock structures and design intent ...
26 days ago
Description: Job Title: GLS Design Verification Engineer Location: Canada Remote Duration / Term: 6+ ... Case analysis).Good understanding of RTL synthesis, Static Timing Analysis & LEC ...
20 days ago
Description: Job Title: GLS Design Verification Engineer Location: Canada Remote Duration / Term: 6+ ... Case analysis).Good understanding of RTL synthesis, Static Timing Analysis & LEC ...
21 days ago
Description: Job Title: GLS Design Verification Engineer Location: Canada Remote Duration / Term: 6+ ... Case analysis).Good understanding of RTL synthesis, Static Timing Analysis & LEC ...
22 days ago
Description: Job Title: GLS Design Verification Engineer Location: Canada Remote Duration / Term: 6+ ... Case analysis).Good understanding of RTL synthesis, Static Timing Analysis & LEC ...
25 days ago
Description: Job Title: GLS Design Verification Engineer Location: Canada Remote Duration / Term: 6+ ... Case analysis).Good understanding of RTL synthesis, Static Timing Analysis & LEC ...
27 days ago
Description: Job Title: GLS Design Verification Engineer Location: Canada Remote Duration / Term: 6+ ... Case analysis).Good understanding of RTL synthesis, Static Timing Analysis & LEC ...
29 days ago
Description: Job Title: SoC Lead Engineer Location: San Jose, CA Company: ... (ARM cores, SMMU, GIC) and design clock/reset architectures.Collaborate with ... teams for test planning and RTL simulation/debug.Perform synthesis, Lint ...
7 days ago
... Title: Power & Performance (PnP) Validation Engineer Location: San Jose, CA Company ... Responsibilities: Validate ARM-based SoC designs focusing on power, performance, and ... testbenches and test cases for RTL/firmware verification in ASIC/FPGA ...
a day ago
... with the architect, RTL designers and other verification engineers to achieve verification ...
18 days ago