Description: Title: Verification Engineer Location: San Jose, CA (5 days ...
25 days ago
... main function of the Verification Engineer is to work with a group ... of researchers and engineers to own the electrical system ...
21 days ago
Description: (hands-on and AXI experience).Should be good in hands-on using SV/UVM.AMBA (especially AXI is a must)Experience in updating sequence, test, running and debuggingExperience in PCIE or C based is a plus
10 hours ago
Description: Mandatory Experience: 7 + years experience in architecting and implementing Design Verification infrastructure and executing the complete verification cycleExperience in the development of UVM based verification environments from ...
21 days ago