... a CAD or AE engineer, supporting Front End Silicon Design tool flows (Synthesis ...
2 days ago
... Responsibilities Own the functional post-silicon validationDevelop and execute test ... plans for post-silicon validationUtilize scripting languages such ... validation processes Mandatory Skills Post Silicon Validation, Bringup Experience on board ...
7 days ago
... Define, document, and implement a UVM verification environment including agents and scoreboards ... checkers, coverage, and other verification collateral - Run tests on RTL ... recommend fixes - Support post-silicon verification activities of the products working ...
18 days ago
Description: Title:Silicon Verification Engineer 5Location: Mountain View,CA(Hybrid) ... Chip/full system level ASIC Verification skills, and debug skills a must ...
a month ago