Description: Location - Bay Area or San Deigo Type - Contract 7+ years of related technical engineering experience 5+ years of experience applying digital design principles in SoC and/or IP development. Proficient in Verilog/System Verilog coding ...
a day ago
Description: Location - Bay Area or San Deigo Type - Contract ASIC VERIFICATION (DV) ENGINEER At-least 5+ years of experience in System Verilog HVL. At-least 5+ year of experience in UVM. Experience with VIP development primarily experienced in DDR PHY / ...
a day ago
Description: Role : FIRMWARE ENGINEER Location : Bay Area or San Diego Duration : Long Term Looking for an experienced Senior Software/Firmware Engineer to design, implement, and troubleshoot complex systems involving FPGA, microprocessor, and DSP ...
a day ago