Description: Title: Pre-Silicon Verification Engineer Contract Length: Initial 6-month contract ( ...
5 days ago
Description: Should be good in hands-on using SV/UVM. AMBA (especially AXI is a must) Experience in updating sequence, test, running and debugging Experience in PCIE or C based is a plus
5 days ago
Description: Role: CAD/EDA Engineer Silicon Design/Verification Infrastructure Location: San Francisco, CA / ... SoC/IP design and/or verification infrastructure development. Proficiency in modern ...
11 days ago
... candidates must reside in the Silicon Valley area The successful candidate ... to client sites in the Silicon Valley area to troubleshoot and ... Service Engineer to service their existing customers in the Silicon Valley area ...
a month ago
... : We are looking for LLM Engineer for our client in Bay ... Area, CA Job Title: LLM Engineer Job Location: Bay Area, CA ... -assisted RTL design, analysis, and verification.Work with RTL experts to ...
18 days ago