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Jobs and careers for junior simulation engineer from the company Dexian disys in San Jose (1 jobs)

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FPGA/RTL Design Engineer

  • Dexian DISYS
  • San Jose
$58 $60 an hour
... Candidates Only) FPGA/RTL Design Engineer San Jose, CA - 100% Onsite ... : RTL Design FPGA experience: Design, simulation, synthesis, and implementation Vivado experience ...
12 days ago

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