... Signal Integrity and Power Integrity (SI/PI) Design Engineer Location: San Jose ... Type: Contract SI/PI Design Engineer Responsibilities: Lead chip-package- ... optimizing signal and power integrity requirements. Define power distribution structures, netlists ...
12 days ago
Description: Role: Post-Silicon Validation Engineer Location: San Jose, CA Hybrid ... : BSEE, MSEE (or higher) in Electrical Engineering preferred. Strong background in ...
12 days ago