Where

Signal Integrity and Power Integrity (SI/PI) Design Engineer

PDDN Inc
San Jose Full-day Full-time

Description:

Role: Signal Integrity and Power Integrity (SI/PI) Design Engineer Location: San Jose, CA 100% Onsite Interview: Phone/Skype Job Type: Contract SI/PI Design Engineer Responsibilities: Lead chip-package-system co-design efforts by analyzing and optimizing signal and power integrity requirements. Define power distribution structures, netlists, and methodologies for High-Performance Computing using 2.5D/3D package technologies. Conduct pre-layout and post-layout simulations for high-speed inter
Mar 20, 2025;   from: dice.com

Similar jobs

  • Datum Software, Inc.
  • San Jose
Job Description: ASIC Package SI/PI Engineer Location: San Jose, CA 100% Onsite ASIC Package Engineer SI/PI Responsibilities: Drive chip-package-system co-design by driving signal and power integrity requirements analysis and optimizationDefine power...
5 days ago
  • Mirafra Inc
  • San Jose

Description:

Experience: 6 to 15+ years of experience. Job Requirements are as below: Architect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. ...
3 days ago
  • Zachary Piper Solutions, LLC
  • San Jose

Description:

Piper Companies is looking for a FPGA Verification Engineer to work onsite in San Jose, CA five days per week . The ideal FPGA Verification Engineer will ensure the integrity and functionality of a digital design environment for FPGA ...
25 days ago

Description:

Role: Mixed-Signal Verification Engineer Location: San Jose, CA 100% Onsite Interview: Phone/Skype Job Type: Contract Qualifications: Strong knowledge of System-Verilog RTL coding, including state machines, adders, multipliers, and ...
26 days ago