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Mixed-Signal Verification Engineer

PDDN Inc
San Jose Full-day Temporary

Description:

Role: Mixed-Signal Verification Engineer Location: San Jose, CA 100% Onsite Interview: Phone/Skype Job Type: Contract Qualifications: Strong knowledge of System-Verilog RTL coding, including state machines, adders, multipliers, and combinatorial logic. Solid understanding of digital design for mixed-signal control loops and experience writing Verilog/Verilog-A code to control analog circuits (e.g., bandgap, PLL, amplifiers, filters, CDR). Familiarity with behavioral Verilog code for analog c
Mar 20, 2025;   from: dice.com

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