Description: Must have/Primary skills: Full chip timing, SDC changes back to block level, Block/Full chip SDC development, Static Timing Analysis, Primetime/Tempus What You'll Be Doing: Being a member of design team who oversees full chip SDCs and works ...

2 days ago

Senior ASIC Design Engineer

PeopleNTech
San Jose

Description: What candidate will Be Doing: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components.Establish prototyping systems in the lab and contribute to ...

10 days ago

SDC Engineer Senior ASIC Design Engineer

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