Description: PSV PCIE Validation & Emulation Engineer Experience: 5 to 8 years Salary Range: DOE Duration: 3 Mnths Location: San Jose,CA, USA Client: Tessolve/ EnChargeAI Job Description: Create and document PCIe validation test plans, test cases, and ...
18 days ago
Description: Job Title: Power & Performance (PnP) Validation Engineer Location: San Jose, CA Company: Tessolve/ Encharge ai Experience: 5 8 years Key Responsibilities: Validate ARM-based SoC designs focusing on power, performance, and system bring-up. ...
18 days ago
Description: Job Title: SoC Lead Engineer Location: San Jose, CA Company: Tessolve/Alphawave Semi Experience: 5 8 years Key Responsibilities: Define SoC architecture and microarchitecture for multi-core ARM-based systems.Integrate IPs (ARM cores, SMMU, ...
24 days ago
Description: Physical Design Engineer Contract First preference : CA Second preference: Anywhere in the US Expected Start Date: 1st week of June Client: TESSOLVE Mandatory Skills/Experience Experience in leading and executing Full-chip Hierarchical ...
24 days ago
Description: Job Title: FPGA Engineer Location: San Jose, CA, USA Company: Tessolve/Alphawave Semi Experience: 5+ years Rate: DOE Key Responsibilities: Design and implement FPGA architectures using VHDL/Verilog.Simulate, verify, and optimize digital ...
25 days ago
Description: Position: 1- Firmware Engineer C, C++ microcontrollers, UART, I2C, SPI, USB, SoC, RTOS, Microcontrollers, Debugging, IoT Development, Hardware Integration. position: 2- Validation Engineer VHDL, Verilog, Hardware Description Languages (HDL), ...
30 days ago