Description:
PSV DDR Validation Engineer Take lead responsibility for validating DDR memory subsystems (LPDDR4x, LPDDR5x) on multiple SoC platforms.Define comprehensive test plans and execute tests covering memory training procedures, performance benchmarks, stress scenarios, timing margin analysis, and overall reliability.Collaborate with design and firmware teams to develop, integrate, and debug firmware essential for memory training. Write necessary firmware components (like bootloaders, memory drivers, t
Aug 8, 2025;
from:
dice.com