... test engineering or related fieldElectrical testing experience at unit and spacecraft level ...
23 hours ago
... interact with design engineers to identify verification scenariosCreate test plans, constrained-random ... verification environments, test cases, regressions ...
14 hours ago
... : Analog and Mixed-Signal Layout Engineer Job Description The candidate should ... work independently on block level and IP level Analog layout design, coordinating ... work with both design engineers and mask design engineers in remote locations ...
22 hours ago
... to ensure coverage, die cost, test cost and DFT integration requirements ... the block and full chip level. Define, implement and validate DFT ... FPGA full chip and sub-systems level. Collaborate closely with cross functional ...
21 hours ago
... related queries at the user level, responding to user needs in ... the optimal running of all systems, among other technical duties. IT ...
19 hours ago