Description: SDC Engineer Location: San Jose CA (Day-1 ... Be Doing: Being a member of design team who oversees fullchip SDCs ... and works with physical design and DFT teams to close ... also do block level RTL design or block or top-level ...
20 hours ago
... Be Doing: Being a member of design team who oversees full chip ... SDCs and works with physical design and DFT teams to close ... also do block level RTL design or block or top-level ...
a day ago