Description: Position: Hardware Design Engineer (Architect) Location: San Jose, USA ... Key skills: Server Board design, Digital&Power Electronics, Microcontroller, ... integrity, Power Integrity, Hardware design, Digital System Design, EDA tools, CAD Tools ...
3 days ago
Description: Job Title: Electrical Engineer High Voltage Design & Cable Systems Experience Required: ... Electrical Engineer with strong expertise in high-voltage system design, electric ... responsibility from high-voltage design and component selection through ...
a day ago
... General Overview Job Title: Staff Engineer, Hardware Design Functional Area: Engineering (ENG ... ) Career Stream: Design Engineering Hardware (DHW) Role: Staff Engineer (SEN) Job ... Indirect Summary The Staff Engineer, Hardware Design works with cross functional ...
a day ago
... Functional Area: Engineering Career Stream: Design - Software Engineering SAP Short Name ... We are seeking an AI Engineer to design and implement AI solutions ...
8 hours ago
$58
$75
an hour
... seeking an experienced Senior Data Engineer to remotely support our enterprise ... looking for a strong Data Engineer to design and scale the data pipelines ...
2 days ago
... Saksoft. I have an excitingopportunityas a AI Engineer with one of our clients ... proceed further. Job Title: AI Engineer Location: San Jose, CA Hire ... Duration: Long Term Job Description: Design refine and test prompts to ...
3 days ago
... are looking for Cloud Platform Engineer for our client in San ... , CA Job Title: Cloud Platform Engineer Job Location: San Jose, CA ... : $73hr - $78hrThe Cloud Platform Engineer OpenShift will design, deploy, and manage enterprise ...
4 days ago
... company. We specialize in the design, manufacture, integration, and test of ... . We are a team of accomplished engineers and operation
4 days ago
Description: Key Responsibilities:Design, develop, and deploy AI/ML ...
5 days ago
... -generation PCIe Switch and Retimer designs across Gen4, Gen5, and Gen6 ...
a day ago
Description: JD Digital DV within a mixed signal chip (ADC), Digital based simulation environment, Test bench not required, it is available already, Test cases to be developed. No need to develop models, Develop test plan etc.. System Verilog, Unix/Linux, ...
2 days ago