Description: Job Title: Design Verification Engineer Locations: San Jose, CA Type ... Familiarity with ASIC, Computer and Embedded Systems Architectures Excellent oral and ... Mandatory Experience Writing and maintaining test plans Creating and maintaining UVM ...
10 days ago
... : PCIE, Ethernet, MIPI, DDR, USB, Embedded C, Python Experience: Strong Understanding of ... developing and executing validation plans,test cases and methodlogies in Silicon ...
23 days ago
... Description: Role: Software SQA engineers Location: San Jose, CA ... candidates with more backend test automation API experience. Need ... a backend test automation expert , customer doesn ... files ,processes..etc Robot Test Framework exp or similar ...
16 days ago
... as an ASIC design verification engineer in San Jose, CA. You ... collaborate closely with verification engineers, designers, hardware and cross functional ... , and monitors for new blocksWrite test plan, develop testcases, debug regression ...
22 days ago
Description: Title: Data Scientist/Engineer Max submissions: 2 ( I will be holding ... model deployment Interview Process: CS test with minimum score required. One ...
16 days ago
... : 12 Months Description: Implement automated tests for CICD pipeline to ensure ... scripting. Help build out automated test scripting using Javascript and Playwright ...
17 days ago