Description: Role: Signal Integrity and Power Integrity (SI/PI) Design Engineer Location: San Jose, ... Type: Contract SI/PI Design Engineer Responsibilities: Lead chip-package- ... by analyzing and optimizing signal and power integrity requirements. Define power ...
27 days ago
... with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog ... simulations and work with design engineers to verify fixes. Write diagnostics ...
4 days ago
... is looking for a FPGA Verification Engineer to work onsite in San ... . The ideal FPGA Verification Engineer will ensure the integrity and functionality of ... UVM. Responsibilities for FPGA Verification Engineer: Develop and implement object-oriented ...
26 days ago