$90
$95
an hour
Description: Mixed Signal Model Verification Engineer San Jose, CA (Hybrid) 3 + Months $ ... SystemVerilog, including real number modeling. Verification Flow: Strong understanding of HDL ...
3 days ago
... : We are seeking experienced ASIC Engineers with a strong background in P4 ... -on experience in ASIC design, verification, or development for networking products ...
28 days ago
... architecture, schematic design, PCB review, board bring-up, debugging, compliance testing ... review, documentationSystem Integration: High-speed board bring-up, signal/
5 days ago
... Processor Unit) AI/ML processors. Board-Level Design:LeadPCB layoutandSI/PI ... /Power Integrity). Debugging:Debug chip, board, and system-level hardware and ... issues. System Bring-up:Design boards intended for ASIC bring-up ...
18 days ago
... Engineer Location: USA Chandler Exp: 5 + years of experience Key skills: Server Board ...
4 days ago