Description: SerDes Validation Engineer Contract for 12+ Months Video ... for an experienced SerDes Validation Engineer to join our team and ... silicon products, including CPUs, GPUs, network cards, and AI accelerators. This ...
a day ago
... SVT QA - SONiC NOS Test Engineer role is designed for a highly ... hands-on experience in testing network operating systems (NOS). The ideal ...
7 days ago
... Cisco ISE (NAC) engineer to work on enterprise Network Access Control. This ...
9 days ago
... Summary We are seeking a Staff Engineer, Networking to join our Sonic ... the development and sustenance of Network Operating Systems (NOS) for white ...
14 days ago
Description: Storage engineer Job Description (Mergers & Acquisitions team) ... to plan and implement storage network interfaces, ensure data is secure ...
27 days ago
... veteran status. TITLE:- IT Infrastructure Engineer LOCATION San Jose, CA (Onsite ... JOB DESCRIPTION The IT Infrastructure Engineer is responsible for designing, building ...
a month ago
Description: Job Title : Data Engineer Location details : Hybrid- 3 days onsite ... remote Duration : 6+ Months Role Summary:Lead data architecture design and implementation ... leveraging Google Cloud Platform and lead Oracle migration efforts Exte
30 days ago
... : Position: SOC Post Silicon Validation Engineer Exp: 10+ years Location: San ... Youll Be Doing / Key Responsibilities:Lead the development and execution of ...
a day ago
Description: Job Title: Security Engineer Data Loss Prevention (DLP) Location: ... are seeking a highly skilled Security Engineer Data Loss Prevention (DLP) to ... protect sensitive data across endpoints, networks, and cloud environ
6 days ago
Description: Job Title: Cyber Security Engineer Data Loss Prevention (DLP) Location: ... are seeking a highly skilled Security Engineer Data Loss Prevention (DLP) to ... protect sensitive data across endpoints, networks, and cloud envir
6 days ago
... hiring a Senior QA Engineer Performance & Reliability to lead the performance characterization and ...
8 days ago
Description: Position: PCIe Validation Engineer Exp: 5-8 years PCIe Gen 4/5/6, CXL, ... C/C++, Python, Perl, Windows, Linux Take lead responsibility for validating PCIe and ...
8 days ago
... : San Jose Summary The Senior Lead Engineer, Hardware Design works with cross ...
14 days ago
... as a BAS Field Programmer & Engineer - Innovate and Lead in Building Control Systems ...
17 days ago
Description: Job Title: Hardware Design Engineer Location: San Jose, CA Job ... Summary: San Jose, CA-based - Lead end-to-end hardware development ...
27 days ago
... are seeking for a Hardware Design Engineer with strong experience in Embedded ... , CA. Job Title: Hardware Design Engineer Location: San Jose, CAJob Description ... Summary: San Jose, CA Based - Lead end-to-end hardware development ...
28 days ago
... Hardware Engineer, you will Drive product from concept to production Lead system ... with Layout, Mechanical and SI engineers to complete the designs Bring ...
29 days ago
... AI Lead Location - San Jose, CA ( Only local to CA) GenAI Engineers ...
a day ago
... - Sr Gen AI Lead Location Contract 1+ year GenAI Engineers build the core ...
7 days ago
... , your ideas power innovation. We lead in intelligent data infrastructure-delivering ...
4 days ago