... reusable infrastructure and orchestration for GenAI systems using Model Context Protocol ...
25 days ago
... Indicator: Indirect Summary The Senior Lead Software Engineer designs, develops, and maintains ...
19 days ago
... Indicator: Indirect Summary The Senior Lead Software Engineer designs, develops, and maintains ...
19 days ago
... Indicator: Indirect Summary The Senior Lead Software Engineer designs, develops, and maintains ...
19 days ago
Description: Req ID: 129893 Region: Americas Country: USA State/Province: California City: San Jose Summary This is an exciting opportunity in Celestica's Hardware Platform Solutions (HPS) group to make a positive impact and be part of a rapid business ...
19 days ago
... : San Jose Summary The Senior Lead Engineer, Hardware Design works with cross ...
26 days ago
... AI Lead Location - San Jose, CA ( Only local to CA) GenAI Engineers build ...
13 days ago
... - Sr Gen AI Lead Location Contract 1+ year GenAI Engineers build the core intelligence ...
19 days ago
Description: GenAI Engineers build the core intelligence layer ...
8 days ago
Description: GenAI Engineers build the core intelligence layer- ...
14 days ago
Description: GenAI Engineers build the core intelligence layer ...
27 days ago
... -learn)NLP, Computer Vision, or GenAI (at least one specialization)SQL ...
15 days ago
Description: Position: AI Engineer Duration: 12+ months contract Location: ... NEEDED :Azure AI, Python, MLOPS, GenAI - LLMOps, Machine Learning AIOPS, Langchain ...
14 hours ago
Description: Title:Lead/Senior Software EngineerLocation: San Jose, ... expertise to architect, design, and lead development of scalable enterprise applicationsDeep ...
19 hours ago
... General Overview Job Title: Staff Engineer, Hardware Design Functional Area: ... Hardware (DHW) Role: Staff Engineer (SEN) Job Code: SEN- ... : Indirect Summary The Staff Engineer, Hardware Design works with ... customers, manufacturing engineering and project lead
5 days ago
Description: Position: PCIe Validation Engineer Exp: 5-8 years PCIe Gen 4/5/6, CXL, ... C/C++, Python, Perl, Windows, Linux Take lead responsibility for validating PCIe and ...
11 days ago
... : Position: SOC Post Silicon Validation Engineer Exp: 10+ years Location: San ... Youll Be Doing / Key Responsibilities:Lead the development and execution of ...
13 days ago
... Overview Job Title: Staff Software Engineer (BSP/Diag/SDK) Functional Area ... and innovative Staff Software Engineers ready to lead complex technical projects and ...
19 days ago
... Overview Job Title: Staff Software Engineer (BSP/Diag/SDK) Functional Area ... and innovative Staff Software Engineers ready to lead complex technical projects and ...
19 days ago
... hiring a Senior QA Engineer Performance & Reliability to lead the performance characterization and ...
19 days ago