Description: Job Title: Senior ASIC Design Engineer Location:San Jose ,CA Contract: 12+ MonthsWhat candidate will Be Doing: Technical: Being a member of design team who oversees fullchip SDCs and works with physical design and DFT teams to close fullchip ...
8 days ago
Description: Job Title: Senior ASIC Design Engineer Location: San Jose, CA What candidate will Be Doing: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components. ...
23 days ago