Where

Senior ASIC Design Engineer

Cloudious
San Jose Full-day Temporary

Description:

Job Description: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components. Establish prototyping systems in the lab and contribute to defining, evolving, and supporting our prototyping methodology. Option to engage in block-level RTL design or block or top-level IP integration. Collaborate with Software, Design, and Verification teams to validate the functional and performance objectives of the SoC. What
Jul 8, 2025;   from: dice.com

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