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Jobs and careers for board level test engineer from the company Pddn inc in Santa Clara (2 jobs)

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Design Verification Engineer with UVM,OVM, SystemVerilog & Python

  • PDDN Inc
  • Santa Clara
Description: Role: Design Verification Engineer Location: Santa Clara, CA Interview: ... analog mixed-signal interfaces. Develop test plans and coverage metrics from ... and writing block and chip-level tests. Creat
10 days ago

SAN Storage Engineer

  • PDDN Inc
  • Santa Clara
... are looking for a SAN Storage Engineer - Location: Santa Clara, CA (Onsite ... Position. Job Title: SAN Storage Engineer Employment Type: Contract 9 months + Possibility ... is looking for a Senior level SAN/Storage engineer responsible for storage infrastructure ...
23 days ago

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